CEN64 rewrite

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MarathonMan
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CEN64 rewrite

Post by MarathonMan » Sat Mar 01, 2014 9:35 am

I've decided that version 0.3 is going to be mostly an entire rewrite. In it's current state, a full-speed CEN64 isn't possible. Fortunately, I've already started with this endeavor.

The new version will feature dynamically recompiled code and multi-threading as I have thought of a way to make use of both of these amenities. The multi-threading, ironically, may itself not provide a performance boost due to the overhead of synchronization across cores, but is an inherent requirement of using dynamically recompiled code in the method that I am using it.

Another thing I am working on during the rewrite is trying to become more Windows-friendly. The new version compiles on MSVC without any quirks or adjustments. In addition, I've also chosen to switch to CMake for the build system as to prevent the need for GNU make. So, those who are locked into the clutches of Microsoft can now rejoice.

---

Technical details:

So far, I have written the dynamic recompiler and tested the feasibility of using it in the method that I intend. The dynamic recompiler (hereafter ECG -- emulator code generator) is a reusable code generator for emulators that can generate code for a wide variety of targets (though I've only implemented an x86_64 backend at the moment). Instead of writing x86_64 ASM, emulator developers can use the ECG API to generate native machine code for any backend that ECG supports, without having to have anything that locks them into a specific architecture in their code. Thus, CEN64 will be ARM-ready from the get go (and anything else, should it crop up). I'll hopefully post it on GitHub in the coming days for developers who wish to play with it.

CEN64 is currently dispatch limited. Each cycle, it uses a table to look up which kind of instruction it should execute, much like a switch statement, and then performs that function. This, as it turns out, it wreaking absolute havoc on most CPU pipelines and is probably my biggest reason for a rewrite. Instead, ECG will be used to dynamically inline these instructions into the C pipeline code. Each instruction will result in a template of the following native machine code being generated. The branches that were once unpredictable are essentially removed and replaced with two calls to the same, predictable location that can easily be taken care of by the BTBs and RAS.

repo: https://github.com/tj90241/ecg

Code: Select all

r4300i_instruction:
  call r4300i_writeback_and_datacache;
  <inlined, recompiled MIPS code>
  call r4300i_decode_and_ifetch;
  if pipeline_stalled
    jmp r4300i_instruction
#
#  Branches generate code to move to a different
#  cycle block using ECG here. Otherwise omitted.
#
  if external_interrupts_pending
    ret
These cycle-blocks are dynamically linked together. A CPU core will continually execute cycle-blocks until it receives an external_interrupt that causes it to drop back into the synchronization handler before going back into execution mode.

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MarathonMan
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Re: CEN64 rewrite

Post by MarathonMan » Sat Mar 01, 2014 11:54 am

The ECG API takes this:

Code: Select all

void gen_core_code(struct ecg_ctx *ctx, struct core *core) {
  uint8_t *label;
  unsigned r0, r1; 
  unsigned r2; 

  ecg_alloc_reg(ctx, &r0);
  ecg_alloc_reg(ctx, &r1);
  ecg_alloc_cs_reg(ctx, &r2);

  ecg_gen_pushpop(ctx, ECG_OPCODE_PUSH, r2);
  ecg_gen_alu_reg(ctx, ECG_OPCODE_MOV, r2, r1, 0x1);

  label = ctx->end;
  ecg_gen_movi64(ctx, r1, (uintptr_t) core_entrypoint_1);
  ecg_gen_alu_reg(ctx, ECG_OPCODE_MOV, r0, r2, 0x1);
  ecg_gen_func(ctx, r1);

  ecg_gen_movi64(ctx, r1, (uintptr_t) core_entrypoint_2);
  ecg_gen_alu_reg(ctx, ECG_OPCODE_MOV, r0, r2, 0x1);
  ecg_gen_func(ctx, r1);

  ecg_gen_ld(ctx, ECG_OPCODE_LWU, r0, r2, offsetof(struct core, status), 0x0);
  ecg_gen_alu_reg(ctx, ECG_OPCODE_TST, r0, r0, 0x0);
  ecg_gen_branch(ctx, ECG_OPCODE_JMP, ECG_COND_EQ, (uintptr_t) label);

  ecg_gen_pushpop(ctx, ECG_OPCODE_POP, r2);
  ecg_gen_ret(ctx);

  ecg_free_reg(ctx, r0);
  ecg_free_reg(ctx, r1);
  ecg_free_reg(ctx, r2);
}
To this:

Code: Select all

0000000000000000 <cycle-0x4>:
   0:	53                   	push   %rbx
   1:	48 89 f3             	mov    %rsi,%rbx

0000000000000004 <cycle>:
   4:	be d0 0f 40 00       	mov    $0x400fd0,%esi
   9:	48 89 df             	mov    %rbx,%rdi
   c:	ff d6                	callq  *%rsi
   e:	be e0 0f 40 00       	mov    $0x400fe0,%esi
  13:	48 89 df             	mov    %rbx,%rdi
  16:	ff d6                	callq  *%rsi
  18:	8b 7b 08             	mov    0x8(%rbx),%edi
  1b:	85 ff                	test   %edi,%edi
  1d:	74 e5                	je     4 <cycle>
  1f:	5b                   	pop    %rbx
  20:	c3                   	retq

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Mizox
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Re: CEN64 rewrite

Post by Mizox » Sat Mar 01, 2014 2:10 pm

I half expected you to post "april fools" after saying that. then I remembered that it's March :P

ANYWAY! this sounds like an awesome change to CEN64. but are you sure you'll be able to maintain the cycle accuracy with a Dynarec core?

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Re: CEN64 rewrite

Post by MarathonMan » Sun Mar 02, 2014 4:11 am

Accuracy is a first-order goal. :D

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Re: CEN64 rewrite

Post by chriztr » Sun Mar 02, 2014 4:46 am

Sounds promising and I'm looking forward to this!

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Re: CEN64 rewrite

Post by Sintendo » Sun Mar 02, 2014 9:23 am

As far as I understand you're essentially building a simple, minimalistic and portable instruction emitting backend which can be easily adapted to various architectures and allows you to reuse the same JIT engine frontend, rather than specializing one for each architecture separately? How exactly does/will the multi-threading fit into this?

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Re: CEN64 rewrite

Post by MarathonMan » Sun Mar 02, 2014 1:11 pm

The primary motivation for doing dynarec is to reduce the mispredictions generated by all the indirect branches by inlining the translated MIPS code into the pipeline. The multi-threading goes hand in hand with these scheme as you would have to generate indirect branches to get back into the dynarec'd code if you executed on a per-cycle basis. With multi-threading, you can execute several blocks of dynarec without being disturbed and the gains will be much greater.

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Re: CEN64 rewrite

Post by Nintendo Maniac 64 » Sun Mar 02, 2014 4:53 pm

With the previous CEN64 design philosophy you stated that multi-threaded, GPGPU, HSA, hUMA, or any number of other things outside of an individual CPU core resulted in too much latency. Seeing how the new plan goes directly against that by actually necessitating multi-threading, does this mean that things like HSA are no longer completely out of the question, or do such things have no real benefit in LLE emulation?


Also a minor second question - by multithreading, you don't just mean two cores correct? For example, Dolphin for the most part hardly gets any benefit from anything more than a dual core (though LLE DSP can optionally be set to use a 3rd core).
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Re: CEN64 rewrite

Post by Sintendo » Mon Mar 03, 2014 7:09 am

I still don't really see what you're going to be executing on the additional threads, though.

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Re: CEN64 rewrite

Post by MarathonMan » Mon Mar 03, 2014 11:09 am

Nintendo Maniac 64 wrote:With the previous CEN64 design philosophy you stated that multi-threaded, GPGPU, HSA, hUMA, or any number of other things outside of an individual CPU core resulted in too much latency. Seeing how the new plan goes directly against that by actually necessitating multi-threading, does this mean that things like HSA are no longer completely out of the question, or do such things have no real benefit in LLE emulation?
Sintendo wrote:I still don't really see what you're going to be executing on the additional threads, though.
Multithreading serves no performance purposes. It's actually proving to be incredibly hard to irk any kind of reasonable performance out of it (and keep in mind that also those technologies -- GPGPU, HSA, hUMA, are currently much, much worse in terms of latency than on-chip cache memories are already). The only reason I'm doing multithreading is because it allows a core to sequentially execute consecutive instructions without having to exit out of the core. When dynarec is in place, performance will be much improved if multiple cycles can be simulated consecutively, instead of doing going round-robin on every component that needs to be cycled as per the current design.
Nintendo Maniac 64 wrote:Also a minor second question - by multithreading, you don't just mean two cores correct? For example, Dolphin for the most part hardly gets any benefit from anything more than a dual core (though LLE DSP can optionally be set to use a 3rd core).
All depends on how much bus traffic the processor will be able to tolerate. I can logically scale to four or more threads without difficulty, but I don't know at what point the threads will be starved for bus traffic because of all the communication required for synchronization.

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Re: CEN64 rewrite

Post by Nintendo Maniac 64 » Mon Mar 03, 2014 4:00 pm

MarathonMan wrote:GPGPU, HSA, hUMA, are currently much, much worse in terms of latency than on-chip cache memories are already
Indeed, a typical case of GPGPU will have very bad latency due to the PCI/e bus and having to copy between memory pools. But just to clarify, even though HSA and hUMA involve the GPU being on the same die as the CPU as well as sharing the same memory pool as the CPU, the latency will still be too much for CEN64 correct?
Last edited by Nintendo Maniac 64 on Tue Mar 04, 2014 1:36 am, edited 2 times in total.
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Re: CEN64 rewrite

Post by OldGnashburg » Mon Mar 03, 2014 5:07 pm

What parts of the N64 would you be emulating on specific threads, most of the Intel i7's are Quad-Cores, so would you have one thread for say, RSP, RCP, RDP, and one for keeping the emulator in sync? Do you have an idea as to where multi-threading will put CEN64 performance-wise? Because I am planning on getting a custom gaming laptop (either that or a nice Macbook PRO), preferably with an Quad-Core Intel i7-4930XM Extreme Mobile Processor @ 3.0-3.9 GHz and a high end Nvidia GPU... And, if Microsoft doesn't fix their piece of crap windows 8 (I actually might be a bit too prejudiced) either way I am going to try and get a 64-bit windows 7 Ultimate. Sorry for my ramblin'...
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Re: CEN64 rewrite

Post by beannaich » Mon Mar 03, 2014 10:11 pm

Nintendo Maniac 64 wrote:
MarathonMan wrote:GPGPU, HSA, hUMA, are currently much, much worse in terms of latency than on-chip cache memories are already
Just to clarify, even though HSA and hUMA involve the GPU being on the same die as the CPU as well as sharing the same memory pool as the CPU, the latency is still too much?
No one cares.

I have never personally found any way to take advantage of using multiple threads in an emulator, except in one case of using them to render the screen once all the hardware emulation was finished for that frame (For post processing effects, such as NTSC filters that executed on the CPU instead of the GPU). Another benefit to that may be to store the entire state of a processing component in thread local storage so when the context changes the stack and everything is preserved? Aside from that, I see threading being a huge roadblock unless you have some clever synchronization scheme.

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Re: CEN64 rewrite

Post by Nintendo Maniac 64 » Mon Mar 03, 2014 10:39 pm

beannaich wrote:No one cares.
GPGPU typically refers to using discrete PCI/e-based GPUs which are very much latency bottlenecked due to the PCI/e bus and even iGPs have quite a bit of latency due to the copying of data between memory pools. Both of these are largely the entire reason why HSA and hUMA even exist.

It's an important distinction to make, hence why I was looking for clarification.

EDIT: I've edited my previous post in an attempt to make it more clear what it is I'm looking for clarification on.
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Re: CEN64 rewrite

Post by jaytheham » Tue Mar 04, 2014 1:14 am

I look forward to seeing the results! And hopefully one day playing body harvest on it :)

How practical will debugging tools (breakpoints, code modification ...) be with the new design?

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Re: CEN64 rewrite

Post by MarathonMan » Tue Mar 04, 2014 9:37 am

Nintendo Maniac 64 wrote:quite a bit of latency due to the copying of data between memory pools. Both of these are largely the entire reason why HSA and hUMA even exist.
Anything not smack dab next to the CPU core is likely too much latency. HSA/hUMA aren't as integrated as one might hope. To put things into perspective:

I've currently written a set of adaptive spinlocks that run entirely in userspace, without any kernel facilities, to try and reduce the amount of time spent locking. These spinlocks show something interesting:
$ time taskset -c 0,4 ./cen64 ../data/pifrom.bin # HT ON

real 0m0.520s
user 0m1.036s
sys 0m0.000s

$ time taskset -c 0,1 ./cen64 ../data/pifrom.bin # HT OFF

real 0m0.649s
user 0m1.292s
sys 0m0.000s
Here's a benchmark of two threads simulating a memory-intensive situation on the VR4300<->BUS. The first run is what result I get when I run cen64 on two logically unified (hyperthreaded) cores (read: the cores share a lot of the same execution logic they're so close), and the second is when I run cen64 on two CPU cores which are physically discreet and instead communicate through the highest level of shared cache. Thus, the penalty from going off-core to another neighboring core incurs a 25% penalty -- you can only imagine what HSA/hUMA do.
jaytheham wrote:I look forward to seeing the results! And hopefully one day playing body harvest on it :)

How practical will debugging tools (breakpoints, code modification ...) be with the new design?
A little more legwork on my end, but it's still totally possible to get the sequential view of committed results for debugging and whatnot. :D

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Re: CEN64 rewrite

Post by Nintendo Maniac 64 » Tue Mar 04, 2014 4:47 pm

Hah, this has got to be one of the only cases where hyperthreading is actually faster than a full separate core. :P

This does make me wonder how AMD's CPU modules would react then since cores in an individual module share a few resources...
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Re: CEN64 rewrite

Post by OldGnashburg » Tue Mar 18, 2014 5:20 pm

Any updates? It has been quite quiet on these forums...
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Re: CEN64 rewrite

Post by ShadowFX » Wed Mar 19, 2014 4:11 pm

Nothing to report I guess ;)

I also guess the front-end work stopped completely? I remember working on the theming of those but no one picked it up afterwards.
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Re: CEN64 rewrite

Post by Mizox » Wed Mar 19, 2014 4:57 pm

OldGnashburg wrote:Any updates? It has been quite quiet on these forums...
well... assuming most of the people on this forum are college students... we DID just have midterms last week. and are currently on break.

bugger if I know what the rest are up to though. maybe Marathon is having to deal with stuff for his job...

I'm cool with waiting it out though. got plenty of other stuff to do with my time =w=

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Re: CEN64 rewrite

Post by MarathonMan » Sat Mar 22, 2014 9:01 am

I guess that's the bad part about having only one primary developer on a project. ;)

I'm currently putting in 80+ hours a week trying to meet deadlines, so there has been virtually no time for CEN64. I have progressed into the new core somewhat, but haven't touched it for a couple weeks now.

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Re: CEN64 rewrite

Post by MarathonMan » Thu Apr 17, 2014 4:33 pm

Tried porting some of the peephole optimizations over from the new core. Still have a couple more to try.Also tried aggressive compiler code profiling to improve results.

Not huge performance gains, but hopefully somewhat noticeable.

Updated binary can be found in the "Downloads" thread.

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Re: CEN64 rewrite

Post by The Extremist » Thu Apr 17, 2014 6:39 pm

Every little bit helps - we're cheering you on!!! :D

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Re: CEN64 rewrite

Post by Net_Bastard » Thu Apr 17, 2014 10:36 pm

Great! Every bit counts, after all.

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Re: CEN64 rewrite

Post by MarathonMan » Sun Apr 20, 2014 9:37 pm

The core rewrite is starting to stabilize. Haven't implemented enough of it to get an idea of performance, but it is easier to track correctness/accuracy.
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Re: CEN64 rewrite

Post by Nintendo Maniac 64 » Sun Apr 20, 2014 10:20 pm

MarathonMan wrote:it is easier to track correctness/accuracy.
Do you mean vs the current/old Cen64 core?
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Re: CEN64 rewrite

Post by MarathonMan » Sun Apr 20, 2014 10:44 pm

Nintendo Maniac 64 wrote:
MarathonMan wrote:it is easier to track correctness/accuracy.
Do you mean vs the current/old Cen64 core?
Yes.

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Re: CEN64 rewrite

Post by Snowstorm64 » Mon Apr 21, 2014 9:27 am

So this means that you can track down and squash nasty bugs that are currently hitting a lot of games?
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Re: CEN64 rewrite

Post by MarathonMan » Mon Apr 21, 2014 6:16 pm

Snowstorm64 wrote:So this means that you can track down and squash nasty bugs that are currently hitting a lot of games?
Correct. I already found a things that I wasn't handling properly in the prior version (as well as added some delays that I never got around to because of how complex the design was).

Oddly enough, it also looks like it may be significantly faster, too...

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Re: CEN64 rewrite

Post by beannaich » Mon Apr 21, 2014 7:23 pm

MarathonMan wrote:
Snowstorm64 wrote:So this means that you can track down and squash nasty bugs that are currently hitting a lot of games?
Correct. I already found a things that I wasn't handling properly in the prior version (as well as added some delays that I never got around to because of how complex the design was).

Oddly enough, it also looks like it may be significantly faster, too...
Happy to see you're still at it :) Do you have a better synchronization system in place for AV output?

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Re: CEN64 rewrite

Post by MarathonMan » Mon Apr 21, 2014 10:25 pm

err, the synchronization interface IMO was already as good as it gets. The granularity was 62.5 million times/sec. :P

You just have to build an event queue or something to handle the book-keeping at which cycle events need to be processed.

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Re: CEN64 rewrite

Post by beannaich » Fri Apr 25, 2014 9:08 pm

MarathonMan wrote:err, the synchronization interface IMO was already as good as it gets. The granularity was 62.5 million times/sec. :P

You just have to build an event queue or something to handle the book-keeping at which cycle events need to be processed.
Not quite what I meant.. In the original write there wasn't any way I could see to make sure audio didn't have overflows or underflows. This issue isn't exclusive to CEN64, however. Many emulators have terrible synchronization between audio (choppy, distorted) and video (screen tearing, stutters). Simply trying to 'register events at certain cycles' won't be very effective, as nice as it sounds. One (hacky) way of doing audio synchronization is to poll where the play cursor is, and do a spin loop until it becomes a desired value.

When I was trying to add audio to CEN64, this was one of the major issues (aside from not knowing how to DMA the sound data from memory).

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Re: CEN64 rewrite

Post by Nintendo Maniac 64 » Fri Apr 25, 2014 10:34 pm

beannaich wrote:Many emulators have terrible synchronization between audio (choppy, distorted) and video (screen tearing, stutters)
There's always variable refresh displays. :P
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